Login / Signup
Reduced-Code Techniques for On-Chip Static Linearity Test of SAR ADCs.
Renato S. Feitoza
Manuel J. Barragan
Salvador Mir
Published in:
VLSI-SoC (2019)
Keyphrases
</>
high speed
low cost
source code
test cases
test data
synthetic aperture radar
real time
image reconstruction
sar images
multiresolution
markov random field
statistical significance
dynamic analysis
programmable logic