Effects of Voltage and Temperature Variations on the Electrical Masking Capability of Sub-65 nm Combinational Logic Circuits.
Semiu A. OlowogemoWilliam H. RobinsonDaniel B. LimbrickPublished in: DFT (2018)
Keyphrases
- logic circuits
- low power
- low voltage
- cmos technology
- electrical power
- transmission line
- power system
- functional decomposition
- tunnel diode
- power consumption
- short circuit
- electric field
- power dissipation
- low cost
- electrical properties
- room temperature
- power supply
- high speed
- logic synthesis
- active power
- high temperature
- high voltage
- field effect transistors
- human visual system
- metal oxide
- object oriented