Memory block based scan-BIST architecture for application-dependent FPGA testing.
Keita ItoTomokazu YonedaYuta YamatoKazumi HatayamaMichiko InouePublished in: FPGA (2014)
Keyphrases
- application dependent
- hardware architecture
- hardware implementation
- software implementation
- memory management
- associative memory
- fpga implementation
- real time
- hardware architectures
- dedicated hardware
- low cost
- memory requirements
- fpga technology
- high speed
- level parallelism
- reconfigurable hardware
- pipelined architecture
- hardware software co design
- digital signal processors
- memory hierarchy
- processing elements
- memory usage
- neural network
- hardware design
- xilinx virtex
- software architecture
- management system
- image processing
- memory access
- parallel hardware
- signal processing