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A Logic Synthesis Methodology for Low-Power Ternary Logic Circuits.
Sunmean Kim
Sung-Yun Lee
Sunghye Park
Kyung Rok Kim
Seokhyeong Kang
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2020)
Keyphrases
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logic circuits
low power
logic synthesis
high speed
power consumption
low cost
functional decomposition
gate array
tunnel diode
digital signal processing
computer vision
power dissipation
low power consumption
cmos technology
mixed signal