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Q-factor Integrity of 28nm-node High-k Gate Dielectric.

Ying-Jun DengHao-Lun HuYu-Han LiangJian-Ming ChenChing-Chuan ChouShea-Jue WangMu-Chun Wang
Published in: ICKII (2020)
Keyphrases
  • cmos technology
  • leakage current
  • wide range
  • tree structure
  • distributed databases
  • parallel processing
  • database
  • neural network
  • integrity constraints
  • factor analysis
  • trusted computing
  • silicon dioxide
  • gate dielectrics