A 3-nm 27.6-Mbit/mm2 Self-timed SRAM Enabling 0.48 - 1.2 V Wide Operating Range with Far-end Pre-charge and Weak-Bit Tracking.
Yumito AoyagiMakoto YabuuchiTomotaka TanakaYuichiro IshiiYoshiaki OsadaTakaaki NakazatoKoji NiiIsabel WangYu-Hao HsuHong-Chen ChengHung-Jen LiaoTsung-Yung Jonathan ChangPublished in: VLSI Technology and Circuits (2023)