Testing the Configurable Interconnect/Logic Interface of SRAM-Based FPGA's.
Michel RenovellJean-Michel PortalJoan FiguerasYervant ZorianPublished in: DATE (1999)
Keyphrases
- high speed
- random access memory
- low power
- user interface
- power consumption
- signal processing
- power reduction
- multi valued
- real time image processing
- data transmission
- modal logic
- logic programming
- low cost
- query interface
- image processing
- parallel architecture
- power dissipation
- hardware implementation
- logical framework
- classical logic
- single chip
- asynchronous circuits
- logic circuits
- verilog hdl