An effective BIST architecture for power-gating mechanisms in low-power SRAMs.
Alberto BosioLuigi DililloPatrick GirardArnaud VirazelLeonardo Bonet ZordanPublished in: ISQED (2016)
Keyphrases
- low power
- power consumption
- high power
- vlsi architecture
- power management
- low cost
- high speed
- nm technology
- mixed signal
- wireless transmission
- low power consumption
- single chip
- cmos technology
- power saving
- vlsi circuits
- image processing
- logic circuits
- power dissipation
- power reduction
- energy saving
- energy dissipation
- digital signal processing
- image sensor
- design considerations
- delay insensitive
- data flow
- real time
- highly efficient
- gate array
- ultra low power