Optimizing the FPGA Memory Design for a Sobel Edge Detector.
Craig MooreHarald DevosDirk StroobandtPublished in: ERSA (2009)
Keyphrases
- edge detector
- edge detection
- gray level
- scale space
- hardware design
- pattern recognition
- edge detection algorithms
- sar images
- verilog hdl
- figure of merit
- gradient vector
- matching criterion
- efficient implementation
- high speed
- embedded systems
- zero crossing
- signal to noise ratio
- gray scale
- step edges
- object recognition
- image processing