A 0.6V 8b 100MS/s SAR ADC with minimized DAC capacitance and switching energy in 65nm CMOS.
Wen-Lan WuYan ZhuLi DingChi-Hang ChanU. Fat ChioSai-Weng SinSeng-Pan U.Rui Paulo MartinsPublished in: ISCAS (2013)
Keyphrases
- low power
- high speed
- energy dissipation
- cmos technology
- power consumption
- nm technology
- single chip
- analog to digital converter
- ultra low power
- low cost
- energy saving
- energy efficiency
- energy minimization
- sar images
- power dissipation
- silicon on insulator
- energy consumption
- image sensor
- synthetic aperture radar
- metal oxide semiconductor
- high frequency
- circuit design
- low voltage
- real time
- parameter estimation
- wide dynamic range
- transmission electron microscopy
- analog vlsi
- mixed signal
- sar imagery
- focal plane
- image reconstruction