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Investigation and optimization of monolithic 3D logic circuits and SRAM cells considering interlayer coupling.

Ming-Long FanVita Pi-Ho HuYin-Nien ChenPin SuChing-Te Chuang
Published in: ISCAS (2014)
Keyphrases
  • logic circuits
  • low power
  • inter layer
  • power consumption
  • low cost
  • high speed
  • data transmission
  • functional decomposition
  • tunnel diode
  • real time
  • single layer