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Reliability of Wafer-Level Ultra-Thinning down to 3 µm using 20 nm-Node DRAMs.
Zhwen Chen
Young-Suk Kim
Tadashi Fukuda
Koji Sakui
Takayuki Ohba
Tatsuji Kobayashi
Takashi Obara
Published in:
IRPS (2021)
Keyphrases
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preprocessing
high speed
neural network
infrared
topological properties
individual level
reliability analysis
semiconductor manufacturing