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Energy-delay efficient asynchronous-logic 16×16-bit pipelined multiplier based on Sense Amplifier-Based Pass Transistor Logic.

Weng-Geng HoKwen-Siong ChongTong LinBah-Hwee GweeJoseph S. Chang
Published in: ISCAS (2012)
Keyphrases
  • logic programming
  • asynchronous circuits
  • modal logic
  • predicate logic
  • high speed
  • classical logic
  • digital circuits
  • energy minimization
  • dynamic range
  • multi valued
  • delay insensitive
  • shift register