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A 2.7 Gcps and 7-Multiplexing CDMA Serial Communication Chip Using Two-Step Synchronization Technique.
Mitsuru Shiozaki
Toru Mukai
Masahiro Ono
Mamoru Sasaki
Atsushi Iwata
Published in:
IEICE Trans. Electron. (2005)
Keyphrases
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communication systems
high speed
low cost
high bandwidth
computer networks
high density
concurrent processes
multipath
multi user
communication protocol
phase locked loop
interprocess communication
vlsi implementation
circuit design
communication overhead
analytical model
communication channels
virtual environment