Design to Avoid the Over-Gate-Driven Effect on ESD Protection Circuits in Deep-Submicron CMOS Processes.

Ming-Dou Ker Wen-Yi Chen

Published in: ISQED (2004)

Keyphrases

cmos technology
low power
circuit design
vlsi circuits
mixed signal
high speed
chip design
neural network
power consumption
power dissipation
low cost
data driven
design process
digital circuits
nm technology
low voltage
design parameters
design space
steady state