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On automatic-verification pattern generation for SoC withport-order fault model.

Chun-Yao WangShing-Wu TungJing-Yang Jou
Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2002)
Keyphrases
  • pattern generation
  • high dimensional
  • np hard
  • data integration
  • fault model