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Designing logic circuits for probabilistic computation in the presence of noise.

Kundan NepalR. Iris BaharJoseph L. MundyWilliam R. PattersonAlexander Zaslavsky
Published in: DAC (2005)
Keyphrases
  • logic circuits
  • low power
  • functional decomposition
  • bayesian networks
  • tunnel diode
  • case study
  • probabilistic model
  • gate array
  • real time
  • neural network
  • image processing
  • object oriented
  • graphical models