Login / Signup
Resonant-Clock Design for a Power-Efficient, High-Volume x86-64 Microprocessor.
Visvesh S. Sathe
Srikanth Arekapudi
Alexander T. Ishii
Charles Ouyang
Marios C. Papaefthymiou
Samuel Naffziger
Published in:
IEEE J. Solid State Circuits (2013)
Keyphrases
</>
high volume
power consumption
design methodology
functional verification
circuit design
design process
ibm power processor
case study
information technology
high speed
markov chain
embedded systems
data mining
data management
physical design
power management