Login / Signup
A Design Technique for Energy Reduction in NORA CMOS Logic.
Konstantinos Limniotis
Yiorgos Tsiatouhas
Themistoklis Haniotakis
Angela Arapoyanni
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2006)
Keyphrases
</>
chip design
engineering design
design process
artificial intelligence
building blocks
knowledge based systems
low cost
expert systems
infrared
power consumption
low power
knowledge base
design considerations
single chip
digital circuits
logic synthesis
analog vlsi
real time