A 23.6-Mb/mm $^{2}$ SRAM in 10-nm FinFET Technology With Pulsed-pMOS TVC and Stepped-WL for Low-Voltage Applications.
Zheng GuoDaeyeon KimSatyanand NalamJami WiedemerXiaofei WangEric KarlPublished in: IEEE J. Solid State Circuits (2019)
Keyphrases
- cmos technology
- low voltage
- low power
- leakage current
- power consumption
- random access memory
- parallel processing
- power line
- silicon on insulator
- image sensor
- power dissipation
- design considerations
- high speed
- embedded dram
- low cost
- image processing
- power management
- cost effective
- video data
- computer systems
- data processing
- nm technology