Low Power Built-In Self-Test Schemes for Array and Booth Multipliers.
Dimitris BakalisXrysovalantis KavousianosHaridimos T. VergosDimitris NikolosG. Ph. AlexiouPublished in: VLSI Design (2001)
Keyphrases
- low power
- power consumption
- low cost
- high speed
- image sensor
- built in self test
- single chip
- digital signal processing
- vlsi circuits
- high power
- real time
- cmos technology
- wireless transmission
- logic circuits
- vlsi architecture
- low power consumption
- mixed signal
- focal plane
- delay insensitive
- integrated circuit
- digital camera
- gate array