Zwei-Mei Lee

Publication Activity (10 Years)

Years Active: 2003-2016
Publications (10 Years): 1

Top Topics

Cmos Image Sensor

Top Venues

IEEE J. Solid State Circuits

Publications

Su-Hao Wu, Tsung-Kai Kao, Zwei-Mei Lee, Ping Chen, Jui-Yuan Tsai
15.6 A 160MHz-BW 72dB-DR 40mW continuous-time ΔΣ modulator in 16nm CMOS with analog ISI-reduction technique. ISSCC (2016)
Tieng Yi Choke, Hongke Zhang, Sam Chun-Geik Tan, W. Yang, Ying Chow Tan, Satyanarayana Reddy Karri, Yuan Sun, Dan Ping Li, Zwei-Mei Lee, Tianbao Gao, Weimin Shu, Osama Shana'a
A Multiband Mobile Analog TV Tuner SoC With 78-dB Harmonic Rejection and GSM Blocker Detection in 65-nm CMOS. IEEE J. Solid State Circuits 48 (5) (2013)
Chen-Yen Ho, Zwei-Mei Lee, Mu-Chen Huang, Sheng-Jui Huang
A 75.1dB SNDR, 80.2dB DR, 4th-order feed-forward continuous-time sigma-delta modulator with hybrid integrator for silicon TV-tuner application. A-SSCC (2011)
Zwei-Mei Lee, Cheng-Yeh Wang, Jieh-Tsorng Wu
A CMOS 15-bit 125-MS/s Time-Interleaved ADC With Digital Background Calibration. IEEE J. Solid State Circuits 42 (10) (2007)
Zwei-Mei Lee, Cheng-Yeh Wang, Jieh-Tsorng Wu
A CMOS 15-Bit 125-MS/s Time-Interleaved ADC with Digital Background Calibration. CICC (2006)
Hung-Chih Liu, Zwei-Mei Lee, Jieh-Tsorng Wu
A 15-b 40-MS/s CMOS pipelined analog-to-digital converter with digital background calibration. IEEE J. Solid State Circuits 40 (5) (2005)
Hung-Chih Liu, Zwei-Mei Lee, Jieh-Tsorng Wu
Correction to "A 15-Bit 40-MS/s CMOS Pipelined Analog-to-Digital Converter With Digital Background Calibration". IEEE J. Solid State Circuits 40 (11) (2005)
Hung-Chih Liu, Zwei-Mei Lee, Jieh-Tsorng Wu
A digital background calibration technique for pipelined analog-to-digital converters. ISCAS (1) (2003)