15.6 A 160MHz-BW 72dB-DR 40mW continuous-time ΔΣ modulator in 16nm CMOS with analog ISI-reduction technique.
Su-Hao WuTsung-Kai KaoZwei-Mei LeePing ChenJui-Yuan TsaiPublished in: ISSCC (2016)
Keyphrases
- state space
- power consumption
- nm technology
- cmos technology
- mixed signal
- low power
- delta sigma
- power reduction
- sigma delta
- markov chain
- analog to digital converter
- high speed
- analog vlsi
- vlsi architecture
- dynamical systems
- image sensor
- power supply
- cmos image sensor
- power dissipation
- low voltage
- silicon on insulator
- hd video
- focal plane
- single chip
- database
- noise shaping
- digital signal processing
- circuit design
- social sciences
- video camera
- parallel processing