Ziaul Choudhury

Publication Activity (10 Years)

Years Active: 2016-2024
Publications (10 Years): 10

Top Topics

Image Processing

Top Venues

ACM Trans. Archit. Code Optim.

ACM Trans. Embed. Comput. Syst.

Publications

Shashwat Khandelwal, Ziaul Choudhury, Shashwat Shrivastava, Suresh Purini
Accelerating local laplacian filters on FPGAs. CoRR (2024)
Ziaul Choudhury, Anish Gulati, Suresh Purini
FlowPix: Accelerating Image Processing Pipelines on an FPGA Overlay using a Domain Specific Compiler. ACM Trans. Archit. Code Optim. 20 (4) (2023)
Ziaul Choudhury, Shashwat Shrivastava, Lavanya Ramapantulu, Suresh Purini
An FPGA Overlay for CNN Inference with Fine-grained Flexible Parallelism. ACM Trans. Archit. Code Optim. 19 (3) (2022)
Shivani Maurya, Ziaul Choudhury, Suresh Purini
Accuracy Configurable FPGA Implementation of Harris Corner Detection. ISVLSI (2022)
Biji George, Om Ji Omer, Ziaul Choudhury, Anoop V, Sreenivas Subramoney
A Unified Programmable Edge Matrix Processor for Deep Neural Networks and Matrix Algebra. ACM Trans. Embed. Comput. Syst. 21 (5) (2022)
Shashwat Khandelwal, Ziaul Choudhury, Shashwat Shrivastava, Suresh Purini
Accelerating Local Laplacian Filters on FPGAs. FPL (2020)
Suresh Purini, Vinamra Benara, Ziaul Choudhury, Uday Bondhugula
Bitwidth customization in image processing pipelines using interval analysis and SMT solvers. CC (2020)
Shashwat Shrivastava, Ziaul Choudhury, Shashwat Khandelwal, Suresh Purini
FPGA Accelerator for Stereo Vision using Semi-Global Matching through Dependency Relaxation. FPL (2020)
Vinamra Benara, Sahithi Rampalli, Ziaul Choudhury, Suresh Purini, Uday Bondhugula
Synthesizing Power and Area Efficient Image Processing Pipelines on FPGAs using Customized Bit-widths. CoRR (2018)
Ziaul Choudhury, Suresh Purini, Shiva Rama Krishna
A Hybrid CPU+GPU Working-Set Dictionary. ISPDC (2016)