Login / Signup
FPGA Accelerator for Stereo Vision using Semi-Global Matching through Dependency Relaxation.
Shashwat Shrivastava
Ziaul Choudhury
Shashwat Khandelwal
Suresh Purini
Published in:
FPL (2020)
Keyphrases
</>
stereo vision
semi global matching
field programmable gate array
stereo matching
stereo images
embedded systems
vision system
depth information
stereo camera
depth estimation
confidence measures
real time
high quality
dynamic programming
disparity map
stereo pair