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Sahithi Rampalli
Publication Activity (10 Years)
Years Active: 2018-2020
Publications (10 Years): 7
Top Topics
Video Summarization
Systolic Array
Neural Network
Fpga Implementation
Top Venues
CoRR
FPGA
ISCA
DATE
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Publications
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Nagadastagiri Challapalle
,
Sahithi Rampalli
,
Nicholas Jao
,
Akshay Krishna Ramanathan
,
John Sampson
,
Vijaykrishnan Narayanan
FARM: A Flexible Accelerator for Recurrent and Memory Augmented Neural Networks.
J. Signal Process. Syst.
92 (11) (2020)
Nagadastagiri Challapalle
,
Sahithi Rampalli
,
Makesh Chandran
,
Gurpreet S. Kalsi
,
Sreenivas Subramoney
,
John Sampson
,
Vijaykrishnan Narayanan
PSB-RNN: A Processing-in-Memory Systolic Array Architecture using Block Circulant Matrices for Recurrent Neural Networks.
DATE
(2020)
Nagadastagiri Challapalle
,
Makesh Chandran
,
Sahithi Rampalli
,
Vijaykrishnan Narayanan
X-VS: Crossbar-Based Processing-in-Memory Architecture for Video Summarization.
ISVLSI
(2020)
Nagadastagiri Challapalle
,
Sahithi Rampalli
,
Linghao Song
,
Nandhini Chandramoorthy
,
Karthik Swaminathan
,
John Sampson
,
Yiran Chen
,
Vijaykrishnan Narayanan
GaaS-X: Graph Analytics Accelerator Supporting Sparse Data Representation using Crossbar Architectures.
ISCA
(2020)
Sahithi Rampalli
,
Natasha Sehgal
,
Ishita Bindlish
,
Tanya Tyagi
,
Pawan Kumar
Efficient FPGA Implementation of Conjugate Gradient Methods for Laplacian System using HLS.
FPGA
(2019)
Vinamra Benara
,
Sahithi Rampalli
,
Ziaul Choudhury
,
Suresh Purini
,
Uday Bondhugula
Synthesizing Power and Area Efficient Image Processing Pipelines on FPGAs using Customized Bit-widths.
CoRR
(2018)
Sahithi Rampalli
,
Natasha Sehgal
,
Ishita Bindlish
,
Tanya Tyagi
,
Pawan Kumar
Efficient FPGA Implementation of Conjugate Gradient Methods for Laplacian System using HLS.
CoRR
(2018)