Zhixiong Di

Publication Activity (10 Years)

Years Active: 2015-2024
Publications (10 Years): 30

Top Topics

Synthetic Aperture Radar

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

IEICE Electron. Express

Publications

Zhengguang Tang, Cong Li, Hailong You, Zhixiong Di, Linying Zhang, Xingming Liu, Yu Wang, Yong Dai, Geng Bai
Semi-Supervised Transfer Learning Framework for Aging-Aware Library Characterization. IEEE Trans. Circuits Syst. II Express Briefs 71 (3) (2024)
Zhixiong Di, Xufeng Wei, Yiduo Chen, Shuanglong Wu, Peihao Sun, Qiang Wu
A Remote FPGA-based Experimental Teaching System Design Supporting Single-board Multi-user and Multi-board Single-user Operations in MOOCs. ACM Great Lakes Symposium on VLSI (2024)
Zhixiong Di, Runzhe Tao, Lin Chen, Qiang Wu, Yibo Lin
Imbalanced Large Graph Learning Framework for FPGA Logic Elements Packing Prediction. IEEE Trans. Circuits Syst. II Express Briefs 71 (4) (2024)
Jing Mai, Jiarui Wang, Zhixiong Di, Yibo Lin
Multielectrostatic FPGA Placement Considering SLICEL-SLICEM Heterogeneity, Clock Feasibility, and Timing Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Zhixiong Di, Runzhe Tao, Jing Mai, Lin Chen, Yibo Lin
LEAPS: Topological-Layout-Adaptable Multi-Die FPGA Placement for Super Long Line Minimization. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (3) (2024)
Jing Mai, Jiarui Wang, Zhixiong Di, Yibo Lin
Multi-Electrostatic FPGA Placement Considering SLICEL-SLICEM Heterogeneity, Clock Feasibility, and Timing Optimization. CoRR (2023)
Zhixiong Di, Runzhe Tao, Jing Mai, Lin Chen, Yibo Lin
LEAPS: Topological-Layout-Adaptable Multi-die FPGA Placement for Super Long Line Minimization. CoRR (2023)
Jing Mai, Jiarui Wang, Zhixiong Di, Guojie Luo, Yun Liang, Yibo Lin
OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit. ASICON (2023)
Weitao Pan, Meng Dong, Cong Wen, Hongjin Liu, Shaolin Zhang, Bo Shi, Zhixiong Di, Zhiliang Qiu, Yiming Gao, Ling Zheng
A unioned graph neural network based hardware Trojan node detection. IEICE Electron. Express 20 (13) (2023)
Qiang Wu, Linjun Wu, Yongyuan Li, Xun Li, Zhixiong Di, Shubin Liu, Zhangming Zhu
A High Precision CV Control Scheme for Low Power AC-DC BUCK Converter Controller. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (10) (2023)
Zhixiong Di, Runzhe Tao, Lin Chen, Qiang Wu, Yibo Lin
Imbalanced Large Graph Learning Framework for FPGA Logic Elements Packing Prediction. CoRR (2023)
Jiarui Wang, Jing Mai, Zhixiong Di, Yibo Lin
A Robust FPGA Router with Concurrent Intra-CLB Rerouting. ASP-DAC (2023)
Jing Mai, Jiarui Wang, Zhixiong Di, Guojie Luo, Yun Liang, Yibo Lin
OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit. CoRR (2023)
Qihan Xu, Yunfan Xiang, Zhixiong Di, Yibo Fan, Quanyuan Feng, Qiang Wu, Jiangyi Shi
Synthetic Aperture Radar Image Compression Based on a Variational Autoencoder. IEEE Geosci. Remote. Sens. Lett. 19 (2022)
Zhixiong Di, Xuan Chen, Qiang Wu, Jiangyi Shi, Quanyuan Feng, Yibo Fan
Learned Compression Framework With Pyramidal Features and Quality Enhancement for SAR Images. IEEE Geosci. Remote. Sens. Lett. 19 (2022)
Jing Mai, Yibai Meng, Zhixiong Di, Yibo Lin
Multi-electrostatic FPGA placement considering SLICEL-SLICEM heterogeneity and clock feasibility. DAC (2022)
Xuan Chen, Zhixiong Di, Wei Wu, Qiang Wu, Jiangyi Shi, Quanyuan Feng
Detailed Routing Short Violation Prediction Using Graph-Based Deep Learning Model. IEEE Trans. Circuits Syst. II Express Briefs 69 (2) (2022)
Qiang Wu, Xun Li, Yongyuan Li, Zhixiong Di, Quanyuan Feng
Implementation of High Precision Error Amplification Scheme for AC-DC Converter. IEEE Trans. Circuits Syst. II Express Briefs 69 (3) (2022)
Qiang Wu, Xun Li, Yueyun Han, Zhixiong Di, Quanyuan Feng
A Valley-Locking Control Scheme for an Audible Noise-Free Valley-Skip-Mode Flyback Converter. IEEE Trans. Ind. Electron. 69 (7) (2022)
Zhenyu Shao, Zhixiong Di, Quanyuan Feng, Qiang Wu, Yibo Fan, Xulin Yu, Wenqiang Wang
A High-Throughput VLSI Architecture Design of Canonical Huffman Encoder. IEEE Trans. Circuits Syst. II Express Briefs 69 (1) (2022)
Xiao Yan, Zhixiong Di, Bowen Huang, Minjiang Li, Wenqiang Wang, Xiaoyang Zeng, Yibo Fan
A High Throughput and Energy Efficient Lepton Hardware Encoder With Hash-Based Memory Optimization. IEEE Trans. Circuits Syst. Video Technol. 32 (7) (2022)
Jinwei Chen, Zhixiong Di, Jiangyi Shi, Quanyuan Feng, Qiang Wu
NBLG: A Robust Legalizer for Mixed-Cell-Height Modern Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (11) (2022)
Xiao Yan, Zhixiong Di, Bowen Huang, Minjiang Li, Wenqiang Wang, Xiaoyang Zeng, Yibo Fan
A Power and Area Efficient Lepton Hardware Encoder with Hash-based Memory Optimization. CoRR (2021)
Zhixiong Di, Yongming Tang, Jiahua Lu, Zhaoyang Lv
ASIC Design Principle Course with Combination of Online-MOOC and Offline-Inexpensive FPGA Board. ACM Great Lakes Symposium on VLSI (2021)
Jiangyi Shi, Bo Zhao, Zhengguang Tang, Peijun Ma, Zhixiong Di
A self-clocked binary-seaching digital low-dropout regulator with fast transient response. IEICE Electron. Express 17 (21) (2020)
Wei Wu, Zhixiong Di, Jiangyi Shi, Quanyuan Feng, Zhengguang Tang
A local congestion elimination technique driven by overflow. IEICE Electron. Express 17 (17) (2020)
Yinghui Tian, Yong Hei, Zhizhe Liu, Qi Shen, Zhixiong Di, Tao Chen
A Modified Signal Flow Graph and Corresponding Conflict-Free Strategy for Memory-Based FFT Processor Design. IEEE Trans. Circuits Syst. II Express Briefs (1) (2019)
Lintao Li, Jiangyi Shi, Zhixiong Di
High Parallel VLSI Architecture Design of BPC in JPEG2000. ASICON (2019)
Yinghui Tian, Yong Hei, Zhizhe Liu, Zhixiong Di, Qi Shen, Zenghui Yu
Erratum: A memory-based FFT processor using modified signal flow graph with novel conflict-free address schemes [IEICE Electronics Express Vol. 14 (2017) No. 15 pp. 20170660]. IEICE Electron. Express 14 (22) (2017)
Yinghui Tian, Yong Hei, Zhizhe Liu, Zhixiong Di, Qi Shen, Zenghui Yu
A memory-based FFT processor using modified signal flow graph with novel conflict-free address schemes. IEICE Electron. Express 14 (15) (2017)
Zhixiong Di, Yanlong Wang, Shuang Qiao, Qianyin Xiang, Quanyuan Feng
LC-KO: A congestion-aware and area&timing-oriented placement method. ASICON (2015)
Zhixiong Di, Yue Hao, Jiangyi Shi, Peijun Ma
A High-Throughput VLSI Architecture Design of Arithmetic Encoder in JPEG2000. J. Signal Process. Syst. 81 (2) (2015)