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A Power and Area Efficient Lepton Hardware Encoder with Hash-based Memory Optimization.
Xiao Yan
Zhixiong Di
Bowen Huang
Minjiang Li
Wenqiang Wang
Xiaoyang Zeng
Yibo Fan
Published in:
CoRR (2021)
Keyphrases
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computational power
real time
computing power
internal memory
low cost
optimization problems
rate distortion
main memory
multithreading
parallel architectures
parallel processing
parallel hardware
graphics processors
limited memory
transitive closure
memory requirements
bit rate
motion estimation
data structure