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LEAPS: Topological-Layout-Adaptable Multi-Die FPGA Placement for Super Long Line Minimization.
Zhixiong Di
Runzhe Tao
Jing Mai
Lin Chen
Yibo Lin
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2024)
Keyphrases
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real time
hardware implementation
objective function
high speed
line segments
low cost
software implementation
website
signal processing
field programmable gate array
topological properties
information retrieval
hardware design
fpga implementation