Zhe Lin

Publication Activity (10 Years)

Years Active: 2017-2024
Publications (10 Years): 13

Top Topics

Bayesian Classifier

Clock Frequency

Power Management

Hardware Architectures

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

IEEE Trans. Multi Scale Comput. Syst.

Publications

Chunyou Su, Linfeng Du, Tingyuan Liang, Zhe Lin, Maolin Wang, Sharad Sinha, Wei Zhang
GraFlex: Flexible Graph Processing on FPGAs through Customized Scalable Interconnection Network. FPGA (2024)
Zhe Lin, Sharad Sinha, Wei Zhang
Hard-ODT: Hardware-Friendly Online Decision Tree Learning Algorithm and System. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (11) (2021)
Zhe Lin, Jieru Zhao, Sharad Sinha, Wei Zhang
HL-Pow: A Learning-Based Power Modeling Framework for High-Level Synthesis. ASP-DAC (2020)
Zhe Lin, Sharad Sinha, Wei Zhang
Towards Efficient and Scalable Acceleration of Online Decision Tree Learning on FPGA. CoRR (2020)
Zhe Lin, Sharad Sinha, Wei Zhang
An Ensemble Learning Approach for In-situ Monitoring of FPGA Dynamic Power. CoRR (2020)
Zhe Lin, Wei Zhang, Sharad Sinha
Decision Tree Based Hardware Power Monitoring for Run Time Dynamic Power Management in FPGA. CoRR (2020)
Zhe Lin, Jieru Zhao, Sharad Sinha, Wei Zhang
HL-Pow: A Learning-Based Power Modeling Framework for High-Level Synthesis. CoRR (2020)
Zhe Lin, Sharad Sinha, Hao Liang, Liang Feng, Wei Zhang
Scalable Light-Weight Integration of FPGA Based Accelerators with Chip Multi-Processors. CoRR (2020)
Zhe Lin, Sharad Sinha, Wei Zhang
Hard-ODT: Hardware-Friendly Online Decision Tree Learning Algorithm and System. CoRR (2020)
Zhe Lin, Sharad Sinha, Wei Zhang
Towards Efficient and Scalable Acceleration of Online Decision Tree Learning on FPGA. FCCM (2019)
Zhe Lin, Sharad Sinha, Wei Zhang
An Ensemble Learning Approach for In-Situ Monitoring of FPGA Dynamic Power. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (9) (2019)
Zhe Lin, Sharad Sinha, Hao Liang, Liang Feng, Wei Zhang
Scalable Light-Weight Integration of FPGA Based Accelerators with Chip Multi-Processors. IEEE Trans. Multi Scale Comput. Syst. 4 (2) (2018)
Zhe Lin, Wei Zhang, Sharad Sinha
Decision tree based hardware power monitoring for run time dynamic power management in FPGA. FPL (2017)