Yuanyong Luo

Publication Activity (10 Years)

Years Active: 2018-2024
Publications (10 Years): 19

Top Topics

Pipelined Architecture

Efficient Implementation

Linear Approximation

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Yu Wang, Haoyu Zhang, Wei Hu, Xin Zhang, Xinyu Tian, Fei Lyu, Yuanyong Luo
An Optimized Architecture for Computing the Square Root of Complex Numbers. ISCAS (2024)
Yu Wang, Xingcheng Liang, Shuai Niu, Chi Zhang, Fei Lyu, Yuanyong Luo
FDM: Fused Double-Multiply Design for Low-Latency and Area- and Power-Efficient Implementation. IEEE Trans. Circuits Syst. II Express Briefs 71 (1) (2024)
Fei Lyu, Yan Xia, Zhelong Mao, Yanxu Wang, Yu Wang, Yuanyong Luo
ML-PLAC: Multiplierless Piecewise Linear Approximation for Nonlinear Function Evaluation. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (4) (2022)
Fei Lyu, Jian Chen, Shuo Huang, Wenxiu Wang, Yuanyong Luo, Yu Wang
Reconfigurable Multifunction Computing Unit Using an Universal Piecewise Linear Method. ISCAS (2022)
Fei Lyu, Yan Xia, Yuheng Chen, Yanxu Wang, Yuanyong Luo, Yu Wang
High-Throughput Low-Latency Pipelined Divider for Single-Precision Floating-Point Numbers. IEEE Trans. Very Large Scale Integr. Syst. 30 (4) (2022)
Fei Lyu, Chaoran Wu, Yuxuan Wang, Hongbing Pan, Yu Wang, Yuanyong Luo
An optimized hardware implementation of the CORDIC algorithm. IEICE Electron. Express 19 (21) (2022)
Muhan Zheng, Yuanyong Luo, Hongbing Pan, Zhongfeng Wang, Yuan Xue
CLA Formula and its Acceleration of Architecture Design for Clustered Look-Ahead Pipelined Recursive Digital Filter. J. Signal Process. Syst. 93 (6) (2021)
Xuan Chen, Xiaopeng Yuan, Gaoming Fu, Yuanyong Luo, Tao Yue, Feng Yan, Yuxuan Wang, Hongbing Pan
Effective Plug-Ins for Reducing Inference-Latency of Spiking Convolutional Neural Networks During Inference Phase. Frontiers Comput. Neurosci. 15 (2021)
Fei Lyu, Zhelong Mao, Jin Zhang, Yu Wang, Yuanyong Luo
PWL-Based Architecture for the Logarithmic Computation of Floating-Point Numbers. IEEE Trans. Very Large Scale Integr. Syst. 29 (7) (2021)
Fei Lyu, Xiaoqi Xu, Yu Wang, Yuanyong Luo, Yuxuan Wang, Hongbing Pan
Ultralow-Latency VLSI Architecture Based on a Linear Approximation Method for Computing Nth Roots of Floating-Point Numbers. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (2) (2021)
Yuxuan Wang, Yuanyong Luo, Zhongfeng Wang, Qinghong Shen, Hongbing Pan
GH CORDIC-Based Architecture for Computing $N$ th Root of Single-Precision Floating-Point Number. IEEE Trans. Very Large Scale Integr. Syst. 28 (4) (2020)
Manzhen Wang, Yuanyong Luo, Mengyu An, Yuou Qiu, Muhan Zheng, Zhongfeng Wang, Hongbing Pan
An Optimized Compression Strategy for Compressor-Based Approximate Multiplier. ISCAS (2020)
Hui Chen, Lin Jiang, Yuanyong Luo, Zhonghai Lu, Yuxiang Fu, Li Li, Zongguang Yu
A CORDIC-Based Architecture with Adjustable Precision and Flexible Scalability to Implement Sigmoid and Tanh Functions. ISCAS (2020)
Hongxi Dong, Manzhen Wang, Yuanyong Luo, Muhan Zheng, Mengyu An, Yajun Ha, Hongbing Pan
PLAC: Piecewise Linear Approximation Computation for All Nonlinear Unary Functions. IEEE Trans. Very Large Scale Integr. Syst. 28 (9) (2020)
Huaqing Sun, Yuanyong Luo, Yajun Ha, Yinghuan Shi, Yang Gao, Qinghong Shen, Hongbing Pan
A Universal Method of Linear Approximation With Controllable Error for the Efficient Implementation of Transcendental Functions. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2020)
Yuanyong Luo, Yuxuan Wang, Yajun Ha, Zhongfeng Wang, Siyuan Chen, Hongbing Pan
Corrections to "Generalized Hyperbolic CORDIC and Its Logarithmic and Exponential Computation With Arbitrary Fixed Base". IEEE Trans. Very Large Scale Integr. Syst. 27 (9) (2019)
Yuanyong Luo, Yuxuan Wang, Yajun Ha, Zhongfeng Wang, Siyuan Chen, Hongbing Pan
Generalized Hyperbolic CORDIC and Its Logarithmic and Exponential Computation With Arbitrary Fixed Base. IEEE Trans. Very Large Scale Integr. Syst. 27 (9) (2019)
Yuanyong Luo, Hongbing Pan, Qinghong Shen, Zhongfeng Wang
CLA Formula Aided Fast Architecture Design for Clustered Look-Ahead Pipelined IIR Digital Filter. SiPS (2019)
Yuanyong Luo, Yuxuan Wang, Huaqing Sun, Yi Zha, Zhongfeng Wang, Hongbing Pan
CORDIC-Based Architecture for Computing Nth Root and Its Implementation. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2018)