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Ultralow-Latency VLSI Architecture Based on a Linear Approximation Method for Computing Nth Roots of Floating-Point Numbers.
Fei Lyu
Xiaoqi Xu
Yu Wang
Yuanyong Luo
Yuxuan Wang
Hongbing Pan
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2021)
Keyphrases
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linear approximation
floating point
computational complexity
pattern recognition
pairwise
support vector
support vector machine