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Yu-Zhe Wang
ORCID
Publication Activity (10 Years)
Years Active: 2018-2019
Publications (10 Years): 3
Top Topics
Physiological Signals
Power Consumption
Systolic Array
Digital Signal
Top Venues
VLSI-DAT
VLSI Circuits
IEEE J. Solid State Circuits
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Publications
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Yu-Zhe Wang
,
Yao-Pin Wang
,
Yi-Chung Wu
,
Chia-Hsiang Yang
A 12.6 mW, 573-2901 kS/s Reconfigurable Processor for Reconstruction of Compressively Sensed Physiological Signals.
IEEE J. Solid State Circuits
54 (10) (2019)
Yu-Zhe Wang
,
Jingjie Wu
,
Shi-Hao Chen
,
Mango Chia-Tso Chao
,
Chia-Hsiang Yang
Micro-Architecture Optimization for Low-Power Bitcoin Mining ASICs.
VLSI-DAT
(2019)
Yu-Zhe Wang
,
Yao-Pin Wang
,
Yi-Chung Wu
,
Chia-Hsiang Yang
A 12.6MW 573-2, 901KS/S Reconfigurable Processor for Reconstruction of Compressively-Sensed Phvsiological Signals.
VLSI Circuits
(2018)