A 12.6MW 573-2, 901KS/S Reconfigurable Processor for Reconstruction of Compressively-Sensed Phvsiological Signals.
Yu-Zhe WangYao-Pin WangYi-Chung WuChia-Hsiang YangPublished in: VLSI Circuits (2018)
Keyphrases
- digital signal
- signal reconstruction
- power consumption
- systolic array
- image reconstruction
- three dimensional
- signal processing
- high resolution
- low cost
- compressive sensing
- induction motor
- high speed
- parallel processing
- discrete tomography
- functional units
- real time
- independent component analysis
- reconstruction method
- reconstruction process
- single chip