Yu-Chen Tsai

Publication Activity (10 Years)

Years Active: 1988-2023
Publications (10 Years): 5

Top Topics

Quantitative Analysis

Cortical Thickness

Benchmark Datasets

Top Venues

Publications

Chia-Ho Ou, Yu-Hong Li, Chih-Yu Chen, Chi-Hsuan Wu, Yu-Chen Tsai, Zhi-You Yan, Ching-Ray Chang
Quantum-Inspired Optimization for Task Scheduling in Software Development Projects. QCE (2023)
Han-Wei Chang, Chien-Lin Chen, Yan-Hua Chen, Yu-Ming Chang, Feng-Jiin Liu, Yu-Chen Tsai
Electrochemical Organophosphorus Pesticide Detection Using Nanostructured Gold-Modified Electrodes. Sensors 22 (24) (2022)
Han-Wei Chang, Chia-Wei Su, Jia-Hao Tian, Yu-Chen Tsai
Non-Enzymatic Glucose Sensing Based on Incorporation of Carbon Nanotube into Zn-Co-S Ball-in-Ball Hollow Sphere. Sensors 20 (15) (2020)
Yi-Ling Chen, Tzu-Wei Huang, Kai-Han Chang, Yu-Chen Tsai, Hwann-Tzong Chen, Bing-Yu Chen
Quantitative Analysis of Automatic Image Cropping Algorithms: A Dataset and Comparative Study. CoRR (2017)
Yi-Ling Chen, Tzu-Wei Huang, Kai-Han Chang, Yu-Chen Tsai, Hwann-Tzong Chen, Bing-Yu Chen
Quantitative Analysis of Automatic Image Cropping Algorithms: A Dataset and Comparative Study. WACV (2017)
Shou-Jen Lin, Jui-Le Chen, Yu-Chen Tsai, Ping-Chun Chang, Chu-Sing Yang
Gesture Identification Research and Applications in Evaluation Systems. ICWL (2013)
Tzu-Chuan Chou, Jau-Rong Chen, Yu-Chen Tsai
The Technology Structure and Appropriation of Server-Based Computing: A Case Study of a Taiwanese High Tech Firm. PACIS (2006)
Shyue-Kung Lu, Yu-Chen Tsai, Chih-Hsien Hsu, Kuo-Hua Wang, Cheng-Wen Wu
Efficient built-in redundancy analysis for embedded memories with 2-D redundancy. IEEE Trans. Very Large Scale Integr. Syst. 14 (1) (2006)
Viktor K. Prasanna, Yu-Chen Tsai
On Synthesizing Optimal Family of Linear Systolic Arrays for Matrix Multiplication. IEEE Trans. Computers 40 (6) (1991)
V. K. Prasanna Kumar, Yu-Chen Tsai
Mapping dynamic programming onto a linear systolic array. J. VLSI Signal Process. 1 (4) (1990)
Viktor K. Prasanna, Yu-Chen Tsai
On Mapping Algorithms to Linear and Fault-Tolerant Systolic Arrays. IEEE Trans. Computers 38 (3) (1989)
Viktor K. Prasanna, Yu-Chen Tsai
Designing Linear Systolic Arrays. J. Parallel Distributed Comput. 7 (3) (1989)
Viktor K. Prasanna, Yu-Chen Tsai
Mapping Two Dimensional Systolic Arrays to One Dimensional Arrays and Applications. ICPP (1) (1988)