Yizhe Hu

Publication Activity (10 Years)

Years Active: 2013-2023
Publications (10 Years): 17

Top Topics

Metal Oxide Semiconductor

Noise Reduction

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Circuits Syst. II Express Briefs

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Weichen Tao, Weichen Zhao, Robert Bogdan Staszewski, Fujiang Lin, Yizhe Hu
An 18.8-to-23.3 GHz ADPLL Based on Charge-Steering-Sampling Technique Achieving 75.9 fs RMS Jitter and -252 dB FoM. VLSI Technology and Circuits (2023)
Xi Chen, Yizhe Hu, Teerachot Siriburanon, Jianglin Du, Robert Bogdan Staszewski, Anding Zhu
A 30-GHz Class-F Quadrature DCO Using Phase Shifts Between Drain-Gate-Source for Low Flicker Phase Noise and I/Q Exactness. IEEE J. Solid State Circuits 58 (7) (2023)
Yizhe Hu, Xi Chen, Teerachot Siriburanon, Jianglin Du, Vivek Govindaraj, Anding Zhu, Robert Bogdan Staszewski
A Charge-Sharing Locking Technique With a General Phase Noise Theory of Injection Locking. IEEE J. Solid State Circuits 57 (2) (2022)
Jianglin Du, Yizhe Hu, Teerachot Siriburanon, Enis Kobal, Philip Quinlan, Anding Zhu, Robert Bogdan Staszewski
Noise Over Wide Tuning Range. IEEE J. Solid State Circuits 57 (2) (2022)
Xi Chen, Yizhe Hu, Teerachot Siriburanon, Jianglin Du, Robert Bogdan Staszewski, Anding Zhu
Flicker Phase-Noise Reduction Using Gate-Drain Phase Shift in Transformer-Based Oscillators. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (3) (2022)
Yizhe Hu, Teerachot Siriburanon, Robert Bogdan Staszewski
Multirate Timestamp Modeling for Ultralow-Jitter Frequency Synthesis: A Tutorial. IEEE Trans. Circuits Syst. II Express Briefs 69 (7) (2022)
Yizhe Hu, Teerachot Siriburanon, Robert Bogdan Staszewski
Oscillator Flicker Phase Noise: A Tutorial. IEEE Trans. Circuits Syst. II Express Briefs 68 (2) (2021)
Jianglin Du, Teerachot Siriburanon, Yizhe Hu, Vivek Govindaraj, Robert Bogdan Staszewski
A Reference-Waveform Oversampling Technique in a Fractional-N ADPLL. IEEE J. Solid State Circuits 56 (11) (2021)
Jianglin Du, Teerachot Siriburanon, Xi Chen, Yizhe Hu, Vivek Govindaraj, Anding Zhu, Robert Bogdan Staszewski
A 24-31 GHz Reference Oversampling ADPLL Achieving FoMjitter-N of -269.3 dB. VLSI Circuits (2021)
Yizhe Hu, Xi Chen, Teerachot Siriburanon, Jianglin Du, Zhong Gao, Vivek Govindaraj, Anding Zhu, Robert Bogdan Staszewski
17.6 A 21.7-to-26.5GHz Charge-Sharing Locking Quadrature PLL with Implicit Digital Frequency-Tracking Loop Achieving 75fs Jitter and -250dB FoM. ISSCC (2020)
Jianglin Du, Yizhe Hu, Teerachot Siriburanon, Robert Bogdan Staszewski
-Corner Digitally Controlled Oscillator with Vertically Integrated Switched Capacitor Banks Achieving FoMT of -199dB in 28-nm CMOS. CICC (2019)
Vivek Govindaraj, Jianglin Du, Yizhe Hu, Teerachot Siriburanon, Robert Bogdan Staszewski
DTC-Assisted All-Digital Phase-Locked Loop Exploiting Hybrid Time/Voltage Phase Digitization. APCCAS (2019)
Yizhe Hu, Teerachot Siriburanon, Robert Bogdan Staszewski
Intuitive Understanding of Flicker Noise Reduction via Narrowing of Conduction Angle in Voltage-Biased Oscillators. IEEE Trans. Circuits Syst. II Express Briefs (12) (2019)
Zhong Gao, Yizhe Hu, Teerachot Siriburanon, Robert Bogdan Staszewski
28 GHz Quadrature Frequency Generation Exploiting Injection-Locked Harmonic Extractors for 5G Communications. NEWCAS (2019)
Yizhe Hu, Teerachot Siriburanon, Robert Bogdan Staszewski
Oscillator in 28-nm CMOS Using Implicit Resonance and Explicit Common-Mode Return Path. IEEE J. Solid State Circuits 53 (7) (2018)
Yizhe Hu, Teerachot Siriburanon, Robert Bogdan Staszewski
corner. ESSCIRC (2017)
Yizhe Hu, Wei Li
A modeling approach for mixed-mode FMCW synthesizer allowing frequency error analysis. ISCAS (2015)
Xinsheng Wang, Yizhe Hu, Liang Han, Jinghu Li, Chenxu Wang, Mingyan Yu
A Low Power and variation-Insensitive Current-Mode Signaling Scheme. J. Circuits Syst. Comput. 22 (8) (2013)