Xinwang Zhang

Publication Activity (10 Years)

Years Active: 2012-2020
Publications (10 Years): 4

Top Topics

Preprocessing Phase

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Microelectron. J.

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Ziyu Jia, Youfang Lin, Jing Wang, Kaixin Yang, Tianhang Liu, Xinwang Zhang
MMCNN: A Multi-branch Multi-scale Convolutional Neural Network for Motor Imagery Classification. ECML/PKDD (3) (2020)
Xinwang Zhang, Zipeng Chen, Yanqiang Gao, Yang Xu, Bingqiao Liu, Qian Yu, Yichuang Sun, Zhihua Wang, Baoyong Chi
A 0.1-5.0 GHz flexible SDR receiver with digitally assisted calibration in 65 nm CMOS. Microelectron. J. 72 (2018)
Xinwang Zhang, Zipeng Chen, Yanqiang Gao, Feng Ma, Jiachen Hao, Guodong Zhu, Baoyong Chi
An Interference-Robust Reconfigurable Receiver With Automatic Frequency-Calibrated LNA in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 25 (11) (2017)
Yang Xu, Xinwang Zhang, Zhihua Wang, Baoyong Chi
A Flexible Continuous-Time Δ Σ ADC With Programmable Bandwidth Supporting Low-Pass and Complex Bandpass Architectures. IEEE Trans. Very Large Scale Integr. Syst. 25 (3) (2017)
Xinwang Zhang, Bingqiao Liu, Zhihua Wang, Baoyong Chi
An LP/CBP reconfigurable analog baseband circuit for software-defined radio receivers in 65 nm CMOS. Microelectron. J. 46 (1) (2015)
Yun Yin, Baoyong Chi, Zhigang Sun, Xinwang Zhang, Zhihua Wang
A 0.1-6.0-GHz Dual-Path SDR Transmitter Supporting Intraband Carrier Aggregation in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 23 (5) (2015)
Xinwang Zhang, Yichuang Sun, Zhihua Wang, Baoyong Chi
A 0.5-30GHz wideband differential CMOS T/R switch with independent bias and leakage cancellation techniques. ISCAS (2015)
Xinwang Zhang, Baoyong Chi, Zhihua Wang
A 0.1-1.5 GHz Harmonic Rejection Receiver Front-End With Phase Ambiguity Correction, Vector Gain Calibration and Blocker-Resilient TIA. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2015)
Xinwang Zhang, Zhihua Wang, Baoyong Chi
A 0.1-1.5GHz harmonic rejection receiver front-end with hybrid 8 phase LO generator, phase ambiguity correction and vector gain calibration. A-SSCC (2014)
Xinwang Zhang, Baoyong Chi, Bingqiao Liu, Zhihua Wang
-80dBm∼0dBm dynamic range, 30mV/dB detection sensitivity piecewise RSSI for SDR/CR receivers. MWSCAS (2014)
Xinwang Zhang, Yang Xu, Bingqiao Liu, Qian Yu, Siyang Han, Qiongbing Liu, Zehong Zhang, Yanqiang Gao, Zhihua Wang, Baoyong Chi
A 0.1-5GHz flexible SDR receiver in 65nm CMOS. A-SSCC (2014)
Xinwang Zhang, Yun Yin, Meng Cao, Zhigang Sun, Ling Fu, Zhaokang Xia, Hongxing Feng, Xing Zhang, Baoyong Chi, Ming Xu, Zhihua Wang
A 0.1~4GHz receiver and 0.1~6GHz transmitter with reconfigurable 10~100MHz signal bandwidth in 65nm CMOS. CICC (2012)