Xianshan Wen

Publication Activity (10 Years)

Years Active: 2017-2024
Publications (10 Years): 6

Top Topics

Wavelet Decomposition

Sampling Strategy

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Xianshan Wen, Tao Fu, Liang Fang, Ping Gui
A 12-bit 1.1GS/s Pipelined-SAR ADC With Adaptive Inter-Stage Redundancy in 28 nm CMOS. IEEE Access 12 (2024)
Xianshan Wen, Ruobing Hua, Jianye Liu, Tao Fu, Liang Fang, Xiaoran Wang, Mitch A. Thornton, Ping Gui
Controller Area Network (CAN) Bus Transceiver with Authentication Support. ISCAS (2022)
Liang Fang, Xianshan Wen, Tao Fu, Guanhua Wang, Sandeep Miryala, Tiehui Ted Liu, Ping Gui
in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 30 (2) (2022)
Liang Fang, Xianshan Wen, Tao Fu, Ping Gui
A 12-Bit 1 GS/s RF Sampling Pipeline-SAR ADC With Harmonic Injecting Cross-Coupled Pair Achieving 7.5 fj/Conv-Step. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (8) (2022)
Liang Fang, Tao Fu, Xianshan Wen, Ping Gui
A 1GS/s 82dB Peak-SFDR 12b Single-Channel Pipe-SAR ADC with Harmonic-Injecting Cross-Coupled-Pair and Fast N-replica Bootstrap Switch Achieving 7.5fj/conv-step. CICC (2021)
Yingyi Luo, Xianshan Wen, Kazutomo Yoshii, Seda Ogrenci Memik, Gokhan Memik, Hal Finkel, Franck Cappello
Evaluating irregular memory access on OpenCL FPGA platforms: A case study with XSBench. FPL (2017)