Vishal Saxena

Publication Activity (10 Years)

Years Active: 2005-2024
Publications (10 Years): 41

Top Topics

Convolutional Neural Network

Integrated Circuit

Design Considerations

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Vishal Saxena, Ankur Kumar, Shubham Mishra, Samuel Palermo, Kadaba R. Lakshmikumar
Optical Interconnects Using Hybrid Integration of CMOS and Silicon-Photonic ICs. IEEE Trans. Circuits Syst. II Express Briefs 71 (3) (2024)
Shubham Mishra, Vishal Saxena
A Sub-1pJ/bit Laser Power Independent 32Gb/s Silicon Photonic EAM Driver in 65nm CMOS. ISCAS (2024)
Md Jubayer Shawon, Vishal Saxena
A 7×4 Silicon Photonic Reconfigurable Optical Analog Processor with Algorithmic Calibration. OFC (2024)
Md Jubayer Shawon, Vishal Saxena
A Silicon Photonic Reconfigurable Optical Analog Processor (SiROAP) with a 4x4 Optical Mesh. ISSCC (2023)
Vikas Kumar, Shubham Mishra, Vishal Saxena
Power Linear DACs (PLDACs) for Configuration and Control of Silicon Photonic Integrated Circuits. ISCAS (2023)
Md Jubayer Shawon, Vishal Saxena
Automatic In-situ Optical Linearization of Silicon Photonic Ring-Assisted MZ Modulator for Integrated RF Photonic SoCs. OFC (2023)
Vishal Saxena, Md Jubayer Shawon
Compact Modeling and Rapid Simulation of Silicon Photonic Micro-Disk and Ring Modulators. CoRR (2023)
Ruthvik Vaila, John N. Chiasson, Vishal Saxena
A Deep Unsupervised Feature Learning Spiking Neural Network With Binarized Classification Layers for the EMNIST Classification. IEEE Trans. Emerg. Top. Comput. Intell. 6 (1) (2022)
Shubham Mishra, Md Jubayer Shawon, Anuar Dorzhigulov, Vishal Saxena
A Hybrid CMOS Photonic 25Gbps Microring Transmitter with a -0.5-1.2V Direct-Coupled Drive. ISCAS (2022)
Anuar Dorzhigulov, Shubham Mishra, Vishal Saxena
Hybrid CMOS-RRAM Spiking CNNs with Time-Domain Max-pooling and Integrator Re-use. ISCAS (2022)
Vishal Saxena
A Mixed-Signal Convolutional Neural Network Using Hybrid CMOS-RRAM Circuits. ISCAS (2021)
Md Jubayer Shawon, Vishal Saxena
Analysis of Trade-offs in RF Photonic Links based on Multi-Bias Tuning of Silicon Photonic Ring-Assisted Mach Zehnder Modulators. CoRR (2021)
Vishal Saxena
Mixed-Signal Neuromorphic Computing Circuits Using Hybrid CMOS-RRAM Integration. IEEE Trans. Circuits Syst. II Express Briefs 68 (2) (2021)
Ruthvik Vaila, John N. Chiasson, Vishal Saxena
A Deep Unsupervised Feature Learning Spiking Neural Network with Binarized Classification Layers for EMNIST Classification. CoRR (2020)
Vishal Saxena
A Process-Variation Robust RRAM-Compatible CMOS Neuron for Neuromorphic System-on-a-Chip. ISCAS (2020)
Md Jubayer Shawon, Vishal Saxena
Analysis of RF Photonic Link using Silicon Photonic Ring-Assisted Mach Zehnder Modulator. MWSCAS (2020)
Ruthvik Vaila, John N. Chiasson, Vishal Saxena
Continuous Learning in a Single-Incremental-Task Scenario with Spike Features. ICONS (2020)
Md Jubayer Shawon, Vishal Saxena
Rapid Simulation of Photonic Integrated Circuits Using Verilog-A Compact Models. IEEE Trans. Circuits Syst. (10) (2020)
Ruthvik Vaila, John N. Chiasson, Vishal Saxena
Continuous Learning in a Single-Incremental-Task Scenario with Spike Features. CoRR (2020)
Md Jubayer Shawon, Vishal Saxena
Rapid Simulation of Photonic Integrated Circuits using Verilog-A Compact Models. MWSCAS (2019)
Ruthvik Vaila, John N. Chiasson, Vishal Saxena
Deep Convolutional Spiking Neural Networks for Image Classification. CoRR (2019)
Rui Wang, Vishal Saxena
A CMOS Photonic Optical PAM4 Transmitter Linearized using Three-Segment Ring Modulator. MWSCAS (2019)
Ruthvik Vaila, John N. Chiasson, Vishal Saxena
Feature Extraction using Spiking Convolutional Neural Networks. ICONS (2019)
Vishal Saxena
High LRS-Resistance CMOS Memristive Synapses for Energy-Efficient Neuromorphic SoCs. MWSCAS (2019)
Rui Wang, Md Jubayer Shawon, Vishal Saxena
Design and Compact Modeling of Silicon-Photonic Coupling-Based Ring Modulators for Optical Interconnects. MWSCAS (2018)
Xinyu Wu, Vishal Saxena
Dendritic-Inspired Processing Enables Bio-Plausible STDP in Compound Binary Synapses. CoRR (2018)
Cheng Li, Kunzhi Yu, Jinsoo Rhim, Kehan Zhu, Nan Qi, Marco Fiorentino, Thierry Pinguet, Mark Peterson, Vishal Saxena, Samuel Palermo
A 3D-Integrated 56 Gb/s NRZ/PAM4 Reconfigurable Segmented Mach-Zehnder Modulator-Based Si-Photonics Transmitter. BCICTS (2018)
Vishal Saxena
A Compact CMOS Memristor Emulator Circuit and its Applications. MWSCAS (2018)
Vishal Saxena, Xinyu Wu, Kehan Zhu
Energy-Efficient CMOS Memristive Synapses for Mixed-Signal Neuromorphic System-on-a-Chip. ISCAS (2018)
Kehan Zhu, Vishal Saxena
From Design to Test: A High-Speed PRBS. IEEE Trans. Very Large Scale Integr. Syst. 26 (10) (2018)
Vishal Saxena, Xinyu Wu, Kehan Zhu
Energy-Efficient CMOS Memristive Synapses for Mixed-Signal Neuromorphic System-on-a-Chip. CoRR (2018)
Md Jubayer Shawon, Rui Wang, Vishal Saxena
Design and Modeling of Silicon Photonic Ring-Based Linearized RF-to-Optical Modulator. MWSCAS (2018)
Vishal Saxena
A Compact CMOS Memristor Emulator Circuit and its Applications. CoRR (2017)
Kehan Zhu, Vishal Saxena
Case Study of a Hybrid Optoelectronic Limiting Receiver. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2017)
Vishal Saxena, Xinyu Wu, Ira Srivastava, Kehan Zhu
Towards spiking neuromorphic system-on-a-chip with bio-plausible synapses using emerging devices. NANOCOM (2017)
Kehan Zhu, Rui Wang, Xinyu Wu, Vishal Saxena
Behavioral modeling and characterization of silicon photonic Mach-Zehnder modulator. MWSCAS (2017)
Xinyu Wu, Vishal Saxena
Enabling bio-plausible multi-level STDP using CMOS neurons with dendrites and bistable RRAMs. IJCNN (2017)
Kehan Zhu, Sakkarapani Balagopal, Xinyu Wu, Vishal Saxena
Realization of a 10 GHz PLL in IBM 130 nm SiGe BiCMOS process for optical transmitter. ISCAS (2017)
Xinyu Wu, Vishal Saxena
Enabling Bio-Plausible Multi-level STDP using CMOS Neurons with Dendrites and Bistable RRAMs. CoRR (2016)
Kehan Zhu, Vishal Saxena, Xinyu Wu
Modeling and optimization of the bond-wire interface in a Hybrid CMOS-photonic traveling-wave MZM transmitter. SoCC (2016)
Bhibhudatta Sahoo, Vishal Saxena, Karan S. Bhatia
Tutorial 4B: ADC design - from system architecture to transistor level design. SoCC (2016)
Kehan Zhu, Vishal Saxena, Xinyu Wu, Wan Kuang
Design Considerations for Traveling-Wave Modulator-Based CMOS Photonic Transmitters. IEEE Trans. Circuits Syst. II Express Briefs (4) (2015)
Xinyu Wu, Vishal Saxena, Kehan Zhu, Sakkarapani Balagopal
A CMOS Spiking Neuron for Brain-Inspired Neural Networks with Resistive Synapses and In-Situ Learning. CoRR (2015)
Xinyu Wu, Vishal Saxena, Kehan Zhu
Homogeneous Spiking Neuromorphic System for Real-World Pattern Recognition. IEEE J. Emerg. Sel. Topics Circuits Syst. 5 (2) (2015)
Xinyu Wu, Vishal Saxena, Kehan Zhu
Homogeneous Spiking Neuromorphic System for Real-World Pattern Recognition. CoRR (2015)
Xinyu Wu, Vishal Saxena, Kehan Zhu
A CMOS spiking neuron for dense memristor-synapse connectivity for brain-inspired computing. IJCNN (2015)
Xinyu Wu, Vishal Saxena, Kehan Zhu
A CMOS Spiking Neuron for Dense Memristor-Synapse Connectivity for Brain-Inspired Computing. CoRR (2015)
Xinyu Wu, Vishal Saxena, Kehan Zhu, Sakkarapani Balagopal
A CMOS Spiking Neuron for Brain-Inspired Neural Networks With Resistive Synapses and In Situ Learning. IEEE Trans. Circuits Syst. II Express Briefs (11) (2015)
Kehan Zhu, Vishal Saxena, Xinyu Wu
A comprehensive design approach for a MZM based PAM-4 silicon photonic transmitter. MWSCAS (2015)
Kehan Zhu, Vishal Saxena, Wan Kuang
Compact Verilog-A modeling of silicon traveling-wave modulator for hybrid CMOS photonic circuit design. MWSCAS (2014)
Sakkarapani Balagopal, Kehan Zhu, Vishal Saxena
Systematic synthesis of cascaded continuous-time ΔΣ ADCs for wideband data conversion. MWSCAS (2013)
Kehan Zhu, Sakkarapani Balagopal, Vishal Saxena, Wan Kuang
Design of a 10-Gb/s integrated limiting receiver for silicon photonics interconnects. MWSCAS (2013)
Sakkarapani Balagopal, Vishal Saxena
A 1 GS/s, 31 MHz BW, 76.3 dB dynamic range, 34 mW CT-ΔΣ ADC with 1.5 cycle quantizer delay and improved STF. MWSCAS (2012)
Sakkarapani Balagopal, Vishal Saxena
Design of wideband continuous-time ΔΣ ADCs using two-step quantizers. MWSCAS (2012)
Rajaram Mohan Roy Koppula, Sakkarapani Balagopal, Vishal Saxena
Efficient design and synthesis of decimation filters for wideband delta-sigma ADCs. SoCC (2011)
Vishal Saxena, Jon-Fredrik Nielsen, Ignacio Gonzalez-Gomez, Gevorg Karapetyan, Vazgen Khankaldyyan, Marvin D. Nelson Jr., Walter E. Laug
A Non-invasive, Multi-modality Approach Based on NIRS and MRI Techniques For Monitoring Intracranial Brain Tumor Angiogenesis. AIPR (2005)