Enabling bio-plausible multi-level STDP using CMOS neurons with dendrites and bistable RRAMs.

Xinyu Wu Vishal Saxena

Published in: IJCNN (2017)

Keyphrases

neural network
high speed
power consumption
low cost
power supply
vlsi circuits
focal plane
hidden layer
analog vlsi
stochastic process
circuit design
cognitive functions
image sensor
delay insensitive
low voltage
neural models
neural model
visual cortex
three dimensional