Vineet Sahula

Publication Activity (10 Years)

Years Active: 2001-2023
Publications (10 Years): 30

Top Topics

Replacement Policy

Probabilistic Model

Top Venues

Publications

Soma Niloy Ghosh, Vineet Sahula, Lava Bhargava
Reinforcement Learning Based Prefetch-Control Mechanism. APCCAS (2023)
Rashi Kumar, Vineet Sahula
Paninis's Grammar as Computer Language: A Case Study. iSES (2023)
Piyush Jha, Rashi Kumar, Vineet Sahula
Filtering and Extended Vocabulary based Translation for Low-resource Language Pair of Sanskrit-Hindi. ACM Trans. Asian Low Resour. Lang. Inf. Process. 22 (4) (2023)
Soma Niloy Ghosh, Vineet Sahula, Lava Bhargava
Enhanced Multicore Performance Using Novel Thread-Aware Cache Coherence and Prefetch-Control Mechanism. IEEE Embed. Syst. Lett. 15 (1) (2023)
Soma Niloy Ghosh, Vineet Sahula, Lava Bhargava
Reuse-Aware Cache Partitioning Framework for Data-Sharing Multicore Systems. CoRR (2022)
Ramakrishna Vaikuntapu, Vineet Sahula, Lava Bhargava
Variability aware Golden Reference Free methodology for Hardware Trojan Detection Using Robust Delay Analysis. CoRR (2022)
Akshaya M. Ganorkar, Vineet Sahula
Error Correction using PUFs for Reliable Key Generation. iSES (2022)
Soma Niloy Ghosh, Lava Bhargava, Vineet Sahula
SRCP: sharing and reuse-aware replacement policy for the partitioned cache in multicore systems. Des. Autom. Embed. Syst. 25 (3) (2021)
Sandeep Saini, Vineet Sahula
A novel model based on Sequential Adaptive Memory for English-Hindi Translation. Cogn. Comput. Syst. 3 (2) (2021)
Rashi Kumar, Vineet Sahula
Intelligent Approaches for Natural Language Processing for Indic Languages. iSES (2021)
Soma Niloy Ghosh, Vineet Sahula, Lava Bhargava
Reuse-Aware Cache Partitioning Framework for Data-Sharing Multicore Systems. iSES (2021)
Sandeep Saini, Vineet Sahula
Cognitive architecture for natural language comprehension. Cogn. Comput. Syst. 2 (1) (2020)
Rashi Kumar, Piyush Jha, Vineet Sahula
An Augmented Translation Technique for low Resource language pair: Sanskrit to Hindi translation. CoRR (2020)
Arjun Singh Chauhan, Vineet Sahula, A. S. Mandal, Abhigyan Dutta
Intensifying Challenge Obfuscation by Cascading FPGA RO-PUFs for Random Number Generation. VLSI Design (2020)
Arjun Singh Chauhan, Vineet Sahula, Atanendu Sekhar Mandal
Novel Randomized Placement for FPGA Based Robust ROPUF with Improved Uniqueness. CoRR (2020)
Ulhas Deshmukh, Vineet Sahula
Stochastic Automata Network for Performance Evaluation of Heterogeneous SoC Communication. CoRR (2020)
Lintu Rajan, Arathy Varghese, C. Periasamy, Vineet Sahula
Device Design Space Exploration of Thin Film Hydrogen Sensor Based on Macro-model Generated Using Machine Learning. IEEE SENSORS (2019)
Arjun Singh Chauhan, Vineet Sahula, Atanendu Sekhar Mandal
Correction to: Novel Randomized Placement for FPGA Based Robust ROPUF with Improved Uniqueness. J. Electron. Test. 35 (5) (2019)
Arjun Singh Chauhan, Vineet Sahula, Atanendu S. Mandal
Novel Randomized & Biased Placement for FPGA Based Robust Random Number Generator with Enhanced Uniqueness. VLSI Design (2019)
Soma Niloy Ghosh, Lava Bhargava, Vineet Sahula
Comparative Analysis of Control-transfer Instructions On WCET of Real-Time Systems. ISED (2019)
Arjun Singh Chauhan, Vineet Sahula, Atanendu Sekhar Mandal
Novel Randomized Placement for FPGA Based Robust ROPUF with Improved Uniqueness. J. Electron. Test. 35 (5) (2019)
Ramakrishna Vaikuntapu, Lava Bhargava, Vineet Sahula
Novel Variability Aware Path Selection for Self-Referencing Based Hardware Trojan Detection. VLSI Design (2018)
Ramakrishna Vaikuntapu, Lava Bhargava, Vineet Sahula
Golden IC free methodology for hardware Trojan detection using symmetric path delays. VDAT (2016)
Lokesh Garg, Vineet Sahula
Macromodels for Static Virtual Ground Voltage Estimation in Power-Gated Circuits. IEEE Trans. Circuits Syst. II Express Briefs (5) (2016)
Sandeep Saini, Nitin Gupta, Shivin Bhogal, Shubham Sharma, Vineet Sahula
Bayesian learner based language learnability analysis of Hindi. ICACCI (2016)
Tarun Kumar Goyal, Vineet Sahula
Lightweight security algorithm for low power IoT devices. ICACCI (2016)
Lokesh Garg, Vineet Sahula
Accurate and Efficient Estimation of Dynamic Virtual Ground Voltage in Power Gated Circuits. VLSI Design (2016)
Renu Kumawat, Vineet Sahula, Manoj Singh Gaur
Modeling and synthesis of molecular memory. VDAT (2015)
Sandeep Saini, Umang Sehgal, Vineet Sahula
Relative clause based text simplification for improved English to Hindi translation. ICACCI (2015)
Renu Kumawat, Vineet Sahula, Manoj Singh Gaur
Probabilistic model for nanocell reliability evaluation in presence of transient errors. IET Comput. Digit. Tech. 9 (4) (2015)
Rajesh A. Patil, Vineet Sahula, Atanendu S. Mandal
Features classification using geometrical deformation feature vector of support vector machine and active appearance algorithm for automatic facial expression recognition. Mach. Vis. Appl. 25 (3) (2014)
Renu Kumawat, Vineet Sahula, Manoj Singh Gaur
Probabilistic modeling and analysis of molecular memory. ACM J. Emerg. Technol. Comput. Syst. 11 (1) (2014)
Janki Ballabh Sharma, K. K. Sharma, Vineet Sahula
Hybrid image fusion scheme using self-fractional Fourier functions and multivariate empirical mode decomposition. Signal Process. 100 (2014)
Saima Cherukat, Vineet Sahula
Variation Robust Subthreshold SRAM Design with Ultra Low Power Consumption. VDAT (2013)
Nupur Navlakha, Lokesh Garg, Dharmendar Boolchandani, Vineet Sahula
Architectural Level Sub-threshold Leakage Power Estimation of SRAM Arrays with its Peripherals. VDAT (2013)
Namita Sharma, Vineet Sahula, C. P. Ravikumar
Energy Aware Task Scheduling for Soft Real Time Systems using an Analytical Approach for Energy Estimation CoRR (2013)
Rajesh A. Patil, Vineet Sahula, Atanendu S. Mandal
Features classification using support vector machine for a facial expression recognition system. J. Electronic Imaging 21 (4) (2012)
Rajesh A. Patil, Gauri Gupta, Vineet Sahula, Atanendu S. Mandal
Power Aware Hardware Prototyping of Multiclass SVM Classifier Through Reconfiguration. VLSI Design (2012)
Rajesh A. Patil, Vineet Sahula, Atanendu S. Mandal
Facial Expression Recognition in Image Sequences Using Active Shape Model and SVM. EMS (2011)
Ulhas Deshmukh, Vineet Sahula
Stochastic Automata Network Based Approach for Performance Evaluation of Network-on-Chip Communication Architecture. ISVLSI (2010)
Ulhas Deshmukh, Vineet Sahula
Interactive Generalized Semi Markov Process Model for Evaluating Arbitration Schemes of SoC Bus Architectures. EMS (2008)
Vineet Sahula, C. P. Ravikumar, D. Nagchoudhuri
Improvement of ASIC Design Processes. VLSI Design (2002)
Vineet Sahula, C. P. Ravikumar
The Hierarchical Concurrent Flow Graph Approach for Modeling and Analysis of Design Processes. VLSI Design (2001)