Tsun-Hsien Wang

Publication Activity (10 Years)

Years Active: 2007-2015
Publications (10 Years): 3

Top Topics

Cubic Spline Interpolation

Contour Fragments

Top Venues

IEEE Trans. Multim.

Publications

Tsun-Hsien Wang, Jen-Wen Wang, Ching-Te Chiu
Virtual HDR/LDR image synthesizer in multi-core platform. GlobalSIP (2015)
Tsun-Hsien Wang, Cheng-Wen Chiu, Wei-Chen Wu, Jen-Wen Wang, Chun-Yi Lin, Ching-Te Chiu, Jing-Jia Liou
Pseudo-Multiple-Exposure-Based Tone Fusion With Local Region Adjustment. IEEE Trans. Multim. 17 (4) (2015)
Wei-Chen Wu, Tsun-Hsien Wang, Ching-Te Chiu
Edge Curve Scaling and Smoothing with Cubic Spline Interpolation for Image Up-Scaling. J. Signal Process. Syst. 78 (1) (2015)
Loyon Kuo, Tsun-Hsien Wang, Ching-Te Chiu
Gradient-based image up-scaling with local self similarity. GlobalSIP (2014)
Wei-Chen Wu, Tsun-Hsien Wang, Ching-Te Chiu
Edge curve scaling and smoothing with cubic spline interpolation. ICIP (2013)
Wei-Chen Wu, Tsun-Hsien Wang, Ching-Te Chiu
Edge curve scaling and smoothing with cubic spline interpolation for image upscaling. SiPS (2013)
Tsun-Hsien Wang, Ching-Te Chiu
Low visual difference virtual high dynamic range image synthesizer from a single legacy image. ICIP (2011)
Ching-Te Chiu, Tsun-Hsien Wang, Wei-Ming Ke, Chen-Yu Chuang, Jhih-Siao Huang, Wei-Su Wong, Ren-Song Tsay, Cyuan-Jhe Wu
Real-Time Tone-Mapping Processor with Integrated Photographic and Gradient Compression using 0.13 μm Technology on an Arm Soc Platform. J. Signal Process. Syst. 64 (1) (2011)
Wei-Ming Ke, Tsun-Hsien Wang, Ching-Te Chiu
Hardware-efficient virtual high dynamic range image reproduction. ICIP (2009)
Ching-Te Chiu, Tsun-Hsien Wang, Wei-Ming Ke, Chen-Yu Chuang, Jhih-Siao Huang, Wei-Su Wong, Ren-Song Tsay
A 100MHz real-time tone mapping processor with integrated photographic and gradient compression in 0.13 mum technology. SiPS (2008)
Ching-Te Chiu, Tsun-Hsien Wang, Wei-Ming Ke, Chen-Yu Chuang, Jhih-Rong Chen, Rong Yang, Ren-Song Tsay
Design optimization of a global/local tone mapping processor on arm SOC platform for real-time high dynamic range video. ICIP (2008)
Tsun-Hsien Wang, Ching-Te Chiu
Low Power Design of High Performance Memory Access Architecture for HDTV Decoder. ICME (2007)
Chia-Hao Yu, Chung-Kai Liu, Chih-Heng Kang, Tsun-Hsien Wang, Chih-Chien Shen, Shau-Yin Tseng
An Efficient DMA Controller for Multimedia Application in MPU Based SOC. ICME (2007)
Tsun-Hsien Wang, Wei-Ming Ke, Ding-Chuang Zwao, Fang-Chu Chen, Ching-Te Chiu
Block-Based Gradient Domain High Dynamic Range Compression Design for Real-Time Applications. ICIP (3) (2007)
Tsun-Hsien Wang, Wei-Su Wong, Fang-Chu Chen, Ching-Te Chiu
Design and Implementation of a Real-Time Global Tone Mapping Processor for High Dynamic Range Video. ICIP (6) (2007)