Low Power Design of High Performance Memory Access Architecture for HDTV Decoder.
Tsun-Hsien WangChing-Te ChiuPublished in: ICME (2007)
Keyphrases
- low power
- vlsi architecture
- low power consumption
- low cost
- single chip
- power consumption
- cmos technology
- high speed
- mixed signal
- computation intensive
- signal processor
- memory access
- memory hierarchy
- logic circuits
- nm technology
- real time
- high definition television
- memory management
- management system
- data flow
- application specific
- ultra low power
- image sensor
- low density parity check
- main memory