Tryggve Fossum

Publication Activity (10 Years)

Years Active: 1985-2015
Publications (10 Years): 0

Top Topics

Communication Protocol

Formal Analysis

Top Venues

ACM Trans. Archit. Code Optim.

Publications

Chitra Natarajan, Carl J. Beckmann, Anthony Nguyen, Mauricio Araya-Polo, Tryggve Fossum, Detlef Hohl
Simulating stencil-based application on future Xeon Phi processor. PMBS@SC (2015)
Samantika Subramaniam, Simon C. Steely Jr., William Hasenplaugh, Aamer Jaleel, Carl J. Beckmann, Tryggve Fossum, Joel S. Emer
Using in-flight chains to build a scalable cache coherence protocol. ACM Trans. Archit. Code Optim. 10 (4) (2013)
Tryggve Fossum
Multi Core Design for Chip Level Multiprocessing. LASER Summer School (2008)
Tryggve Fossum
On-Die Interconnect and Other Challenges for Chip-Level Multi-Processing. Hot Interconnects (2007)
Shubhendu S. Mukherjee, Joel S. Emer, Tryggve Fossum, Steven K. Reinhardt
Cache Scrubbing in Microprocessors: Myth or Necessity? PRDC (2004)
Tryggve Fossum, David B. Fite
Designing a VAX for high performance. Compcon (1990)
Fernando C. Colón Osorio, Tryggve Fossum, William Hilliard, William Brucket, Paul Guglielmo, John Bloem
The Microarchitecture of the VAX 8600. COMPCON (1985)
Tryggve Fossum, William J. Grundmann, Virginia Blaha
Floating Point Processor for the VAX 8600. COMPCON (1985)