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Tong-Chern Ong
Publication Activity (10 Years)
Years Active: 2002-2020
Publications (10 Years): 2
Top Topics
Optimization Scheme
Top Venues
A-SSCC
ISSCC
VLSI Circuits
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Publications
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Chung-Cheng Chou
,
Zheng-Jun Lin
,
Chien-An Lai
,
Chin-I Su
,
Pei-Ling Tseng
,
Wei-Chi Chen
,
Wu-Chin Tsai
,
Wen-Ting Chu
,
Tong-Chern Ong
,
Harry Chuang
,
Yu-Der Chih
,
Tsung-Yung Jonathan Chang
A 22nm 96KX144 RRAM Macro with a Self-Tracking Reference and a Low Ripple Charge Pump to Achieve a Configurable Read Window and a Wide Operating Voltage Range.
VLSI Circuits
(2020)
Chien-An Lai
,
Chung-Cheng Chou
,
Chi-Hsiang Weng
,
Zheng-Jun Lin
,
Pei-Ling Tseng
,
Chien-Fan Wang
,
Chih-Chen Wang
,
Chin-I Su
,
Wei-Chi Chen
,
Yu-Cheng Lin
,
Tong-Chern Ong
,
Chi Chang
,
Yu-Der Chih
,
Tsung-Yung Jonathan Chang
Logic Process Compatible 40nm 256K×144 Embedded RRAM with Low Voltage Current Limiter and Ambient Compensation Scheme to Improve the Read Window.
A-SSCC
(2018)
Hung-Chang Yu
,
Kai-Chun Lin
,
Ku-Feng Lin
,
Chin-Yi Huang
,
Yu-Der Chih
,
Tong-Chern Ong
,
Tsung-Yung Jonathan Chang
,
Sreedhar Natarajan
,
Luan C. Tran
Cycling endurance optimization scheme for 1Mb STT-MRAM in 40nm technology.
ISSCC
(2013)
Jian-Hsing Lee
,
Jiaw-Ren Shih
,
Yi-Hsun Wu
,
Kuo-Feng Yu
,
Tong-Chern Ong
A new pre-driver design for improving the ESD performance of the high voltage tolerant I/O.
ISCAS (2)
(2005)
C. H. Diaz
,
Mi-Chang Chang
,
Tong-Chern Ong
,
Jack Yuan-Chen Sun
Process and circuit design interlock for application-dependent scaling tradeoffs and optimization in the SoC era.
IEEE J. Solid State Circuits
38 (3) (2003)
Jian-Hsing Lee
,
Yi-Hsun Wu
,
K. R. Peng
,
R. Y. Chang
,
Talee Yu
,
Tong-Chern Ong
The embedded SCR NMOS and low capacitance ESD protection device.
CICC
(2002)
Carlos H. Diaz
,
Mi-Chang Chang
,
Tong-Chern Ong
,
Jack Yuan-Chen Sun
Application-dependent scaling tradeoffs and optimization in the SoC era.
CICC
(2002)