Tohru Moto-Oka

Publication Activity (10 Years)

Years Active: 1960-1986
Publications (10 Years): 0

Publications

Shuichi Sakai, Masaru Kitsuregawa, Hidehiko Tanaka, Tohru Moto-Oka
Interconnection networks for bucket distribution on relational algebra machine GRACE. Systems and Computers in Japan 17 (5) (1986)
Shinya Fushimi, Masaru Kitsuregawa, Hidehiko Tanaka, Tohru Moto-Oka
Design of secondary storage system of database machine grace using generalized KD-tree. Systems and Computers in Japan 17 (6) (1986)
Masahiro Fujita, Shinji Kono, Hidehiko Tanaka, Tohru Moto-Oka
Tokio: Logic Programming Language Based on Temporal Logic and its Compilation to Prolog. ICLP (1986)
Tsutomu Maruyama, Keiji Hirata, Hidehiko Tanaka, Tohru Moto-Oka
A Note on the Elementary Execution Unit in a Parallel Inference Machine. LP (1985)
Masahiro Fujita, Makoto Ishisone, Hiroshi Nakamura, Hidehiko Tanaka, Tohru Moto-Oka
Using the Temporal Logic Programming Language Tokio for Algorithm Description and Automatic CMOS Gate Array Synthesis. LP (1985)
Shinya Fushimi, Masaru Kitsuregawa, Hidehiko Tanaka, Tohru Moto-Oka
Multidimensional Clustering Techniques for Large Relational Database Machines. FODO (1985)
Shinya Fushimi, Masaru Kitsuregawa, Masaya Nakayama, Hidehiko Tanaka, Tohru Moto-Oka
Algorithm and Performance Evaluation of Adaptive Multidimensional Clustering Technique. SIGMOD Conference (1985)
Masaru Kitsuregawa, Shinya Fushimi, Hidehiko Tanaka, Tohru Moto-Oka
Memory Management Algorithms in Pipeline Merge Sorter. IWDM (1985)
Shuichi Sakai, Masaru Kitsuregawa, Hidehiko Tanaka, Tohru Moto-Oka
Interconnection network for bucket collection on relational algebra machine GRACE. Systems and Computers in Japan 16 (5) (1985)
T. Aoyagi, Masahiro Fujita, Tohru Moto-Oka
Temporal Logic Programming Language Tokio - Programming in Tokio. LP (1985)
Tohru Moto-Oka, Hidehiko Tanaka, Hitoshi Aida, Keiji Hirata, Tsutomu Maruyama
The Architecture of a Parallel Inference Engine - PIE. FGCS (1984)
Masahiro Fujita, Hidehiko Tanaka, Tohru Moto-Oka
Specifying Hardware in temporal Logic & Efficient Synthesis of State-Diagrams Using Prolog. FGCS (1984)
Atsuhiro Goto, Hidehiko Tanaka, Tohru Moto-Oka
Highly Parallel Inference Engine PIE: Goal Rewriting Model and Machine Architecture. New Gener. Comput. 2 (1) (1984)
Tohru Moto-Oka, Harold S. Stone
Fifth-Generation Computer Systems: A Japanese Project. Computer 17 (3) (1984)
Tohru Moto-Oka, Kazuhiro Fuchi
The Architectures in the Fifth Generation Computers. IFIP Congress (1983)
Masahiro Fujita, Hidehiko Tanaka, Tohru Moto-Oka
Temporal Logic Based Hardware Description and Its Verification with Prolog. New Gener. Comput. 1 (2) (1983)
Hitoshi Aida, Hidehiko Tanaka, Tohru Moto-Oka
A Prolog Extension for Handling Negative Knowledge. New Gener. Comput. 1 (1) (1983)
Masaru Kitsuregawa, Hidehiko Tanaka, Tohru Moto-Oka
Application of Hash to Data Base Machine and Its Architecture. New Gener. Comput. 1 (1) (1983)
Tohru Moto-Oka
Overview to the Fifth Generation Computer System Project ISCA (1983)
Tohru Moto-Oka
On the Founding of This Journal. New Gener. Comput. 1 (1) (1983)
Masaru Kitsuregawa, Hidehiko Tanaka, Tohru Moto-Oka
Relational Algebra Machine GRACE. RIMS Symposium on Software Science and Engineering (1982)
Tohru Moto-Oka, Tadashi Kurachi, Tsutomu Shiino, Masakatsu Sugimoto
Logic design system in Japan. DAC (1975)
Eiichi Goto, Kenro Murata, Kisaburo Nakazawa, Keisuke Nakagawa, Tohru Moto-Oka, Yasushi Miatsu-Oka, Yoshihiro Ishibashi, Haruhisa Ishida, Takashi Soma, Eiiti Wada
Esaki Diode High-Speed Logical Circuits. IRE Trans. Electron. Comput. 9 (1) (1960)