Thomas A. Hughes

Publication Activity (10 Years)

Years Active: 1990-1994
Publications (10 Years): 0

Publications

C. Thomas Gray, Wentai Liu, Wilhelmus A. M. Van Noije, Thomas A. Hughes, Ralph K. Cavin III
A sampling technique and its CMOS implementation with 1 Gb/s bandwidth and 25 ps resolution. IEEE J. Solid State Circuits 29 (3) (1994)
Wentai Liu, C. Thomas Gray, David Fan, William J. Farlow, Thomas A. Hughes, Ralph K. Cavin III
A 250-MHz wave pipelined adder in 2-μm CMOS. IEEE J. Solid State Circuits 29 (9) (1994)
Matthias F. M. Stallmann, Thomas A. Hughes
Fast Algorithms for One-Dimensional Compaction with Jog Insertion. WADS (1993)
C. Thomas Gray, Thomas A. Hughes, Sanjay Arora, Wentai Liu, Ralph K. Cavin III
Theoretical and Practical Issues in CMOS Wave Pipelining. VLSI (1991)
Matthias F. M. Stallmann, Thomas A. Hughes, Wentai Liu
Unconstrained via minimization for topological multilayer routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9 (9) (1990)
C. Thomas Gray, Wentai Liu, Thomas A. Hughes, Ralph K. Cavin III
The design of a high-performance scalable architecture for image processing applications. ASAP (1990)
C. Thomas Gray, Wentai Liu, Thomas A. Hughes, Ralph K. Cavin III, Su-Shing Chen
A: a partitionable parallel/pipeline architecture for real-time image processing. ICPR (2) (1990)