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A sampling technique and its CMOS implementation with 1 Gb/s bandwidth and 25 ps resolution.

C. Thomas GrayWentai LiuWilhelmus A. M. Van NoijeThomas A. HughesRalph K. Cavin III
Published in: IEEE J. Solid State Circuits (1994)
Keyphrases
  • high speed
  • circuit design
  • high resolution
  • low cost
  • data sets
  • multimedia
  • active learning
  • parallel processing
  • efficient implementation