Thi Hong Tran

Publication Activity (10 Years)

Years Active: 2012-2024
Publications (10 Years): 37

Top Topics

Communication Systems

Hardware Implementation

Top Venues

Publications

Vu Trung Duong Le, Hoai-Luan Pham, Thi Hong Tran, Yasuhiko Nakashima
Flexible and Energy-Efficient Crypto-Processor for Arbitrary Input Length Processing in Blockchain-Based IoT Applications. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 107 (3) (2024)
Pham Hoai Luan, Hai Hau Nguyen, Vu Trung Duong Le, Thi Diem Tran, Tuan Hai Vu, Thi Hong Tran, Yasuhiko Nakashima
MRCA: Multi-grained Reconfigurable Cryptographic Accelerator for Diverse Security Requirements. COOL CHIPS (2024)
Van Duy Tran, Duc Khai Lam, Thi Hong Tran
Robust Deep Learning Approaches for Wireless Communication Systems. ICIT (2023)
Thi Sang Duong, Hoai Luan Pham, Vu Trung Duong Le, Thi Hong Tran, Yasuhiko Nakashima
Power-Efficient and Programmable Hashing Accelerator for Massive Message Processing. SOCC (2023)
Vu Trung Duong Le, Hoai Luan Pham, Thi Hong Tran, Thi Sang Duong, Yasuhiko Nakashima
High-efficiency Reconfigurable Crypto Accelerator Utilizing Innovative Resource Sharing and Parallel Processing. MCSoC (2023)
Pham Hoai Luan, Thi Sang Duong, Vu Trung Duong Le, Thi Hong Tran, Yasuhiko Nakashima
Energy-Efficient Unified Multi-Hash Coprocessor for Securing IoT Systems Integrating Blockchain. MWSCAS (2023)
Thi Sang Duong, Hoai Luan Pham, Vu Trung Duong Le, Thi Diem Tran, Ren Imamura, Quoc Duy Nam Nguyen, Thi Hong Tran, Yasuhiko Nakashima
Universal 32/64-bit CGRA for Lightweight Cryptography in Securing IoT Data Transmission. MCSoC (2023)
Quoc Duy Nam Nguyen, Thi Hong Tran, Tadashi Nakano
Optimizing Parkinson's Disease Classification and Severity Assessment Using Dense Multiscale Sample Entropy and Hybrid Feature Selection. ICIT (2023)
Atsuki Koyama, Van Chuong Tran, Manato Fujimoto, Vo Nguyen Quoc Bao, Thi Hong Tran
A Decentralized COVID-19 Vaccine Tracking System Using Blockchain Technology. Cryptogr. 7 (1) (2023)
Vu Trung Duong Le, Hoai Luan Pham, Thi Sang Duong, Thi Hong Tran, Quoc Duy Nam Nguyen, Yasuhiko Nakashima
RHCP: A Reconfigurable High-efficient Cryptographic Processor for Decentralized IoT Platforms. KSE (2023)
Hoai Luan Pham, Thi Hong Tran, Le Vu Trung Duong, Yasuhiko Nakashima
Flexible and Scalable BLAKE/BLAKE2 Coprocessor for Blockchain-Based IoT Applications. IEEE Des. Test 40 (5) (2023)
Thi Sang Duong, Hoai Luan Pham, Vu Trung Duong Le, Ren Imamura, Thi Hong Tran, Yasuhiko Nakashima
Small-Footprint Reconfigurable Heterogeneous Cryptographic Accelerator for Fog Computing. RIVF (2023)
Vu Trung Duong Le, Hoai Luan Pham, Thi Hong Tran, Thi Sang Duong, Yasuhiko Nakashima
Efficient and High-Speed CGRA Accelerator for Cryptographic Applications. candar (2023)
Vu Trung Duong Le, Hoai Luan Pham, Thi Hong Tran, Quoc Duy Nam Nguyen, Thi Sang Duong, Yasuhiko Nakashima
Versatile Resource-shared Cryptographic Accelerator for Multi-Domain Applications. ICICDT (2023)
Van Duy Tran, Duc Khai Lam, Thi Hong Tran
Hardware-Based Architecture for DNN Wireless Communication Models. Sensors 23 (3) (2023)
Vu Trung Duong Le, Pham Hoai Luan, Thi Hong Tran, Yasuhiko Nakashima
CSIP: A Compact Scrypt IP design with single PBKDF2 core for Blockchain mining. SBCCI (2022)
Hoai Luan Pham, Thi Hong Tran, Le Vu Trung Duong, Yasuhiko Nakashima
A Coarse Grained Reconfigurable Architecture for SHA-2 Acceleration. IPDPS Workshops (2022)
Pham Hoai Luan, Thi Hong Tran, Vu Trung Duong Le, Yasuhiko Nakashima
A High-Efficiency FPGA-based BLAKE-256 Accelerator for Securing Blockchain Networks. MWSCAS (2022)
Hoai Luan Pham, Thi Hong Tran, Le Vu Trung Duong, Yasuhiko Nakashima
Compact Message Permutation for a Fully Pipelined BLAKE-256/512 Accelerator. IEEE Access 10 (2022)
Pham Hoai Luan, Thi Hong Tran, Vu Trung Duong Le, Yasuhiko Nakashima
A Flexible and Energy-Efficient BLAKE-256/2s Co-Processor for Blockchain-based IoT Applications. SBCCI (2022)
Hoai Luan Pham, Thi Hong Tran, Le Vu Trung Duong, Yasuhiko Nakashima
A High-Efficiency FPGA-Based Multimode SHA-2 Accelerator. IEEE Access 10 (2022)
Thi Hong Tran, Hoai Luan Pham, Yasuhiko Nakashima
A High-Performance Multimem SHA-256 Accelerator for Society 5.0. IEEE Access 9 (2021)
Van Dai Phan, Hoai Luan Pham, Thi Hong Tran, Yasuhiko Nakashima
High Performance Multicore SHA-256 Accelerator using Fully Parallel Computation and Local Memory. COOL CHIPS (2021)
Le Vu Trung Duong, Thi Hong Tran, Hoai Luan Pham, Duc Khai Lam, Yasuhiko Nakashima
MRSA: A High-Efficiency Multi ROMix Scrypt Accelerator for Cryptocurrency Mining and Data Security. IEEE Access 9 (2021)
Thi Hong Tran, Hoai Luan Pham, Tri Dung Phan, Yasuhiko Nakashima
BCA: A 530-mW Multicore Blockchain Accelerator for Power-Constrained Devices in Securing Decentralized Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (10) (2021)
Hoai Luan Pham, Thi Hong Tran, Tri Dung Phan, Le Vu Trung Duong, Duc Khai Lam, Yasuhiko Nakashima
Double SHA-256 Hardware Architecture With Compact Message Expander for Bitcoin Mining. IEEE Access 8 (2020)
Duc Phuc Nguyen, Dinh-Dung Le, Thi Hong Tran, Yasuhiko Nakashima
Non-RLL DC-Balance based on a Pre-scrambled Polar Encoder for Beacon-based Visible Light Communication Systems. CoRR (2019)
Van-Cam Nguyen, Hoai Luan Pham, Thi Hong Tran, Huu-Thuan Huynh, Yasuhiko Nakashima
Digitizing Invoice and Managing VAT Payment Using Blockchain Smart Contract. IEEE ICBC (2019)
Dai Long Hoang, Thi Hong Tran, Yasuhiko Nakashima
Hardware Implementation of CORDIC Based Physical Layer Phase Decryption for IEEE 802.11ah. ICCBN (2019)
Dinh-Dung Le, Duc Phuc Nguyen, Thi Hong Tran, Yasuhiko Nakashima
Run-Length Limited Decoding for Visible Light Communications: A Deep Learning Approach. APCC (2019)
Dinh-Dung Le, Duc Phuc Nguyen, Thi Hong Tran, Yasuhiko Nakashima
Log-Likelihood Ratio Calculation Using 3-Bit Soft-Decision for Error Correction in Visible Light Communication Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2018)
Duc Phuc Nguyen, Dinh-Dung Le, Thi Hong Tran, Huu-Thuan Huynh, Yasuhiko Nakashima
Hardware Implementation of A Non-RLL Soft-decoding Beacon-based Visible Light Communication Receiver. CoRR (2018)
Hoai Luan Pham, Thi Hong Tran, Yasuhiko Nakashima
A Secure Remote Healthcare System for Hospital Using Blockchain Smart Contract. GLOBECOM Workshops (2018)
Duc Phuc Nguyen, Thi Hong Tran, Yasuhiko Nakashima
A Multi-Mode Error-Correction Solution Based on Split-Concatenation for Wireless Sensor Nodes. J. Commun. 12 (2) (2017)
Thi Hong Tran, Soichiro Kanagawa, Duc Phuc Nguyen, Yasuhiko Nakashima
ASIC design of MUL-RED Radix-2 Pipeline FFT circuit for 802.11ah system. COOL Chips (2016)
Hiromasa Kato, Thi Hong Tran, Yasuhiko Nakashima
ASIC design of a low-complexity K-best Viterbi decoder for IoT applications. APCCAS (2016)
Hiromasa Kato, Satoshi Shimaya, Keisuke Fujimoto, Tomoya Kameda, Thi Hong Tran, Shinya Takamaeda-Yamazaki, Yasuhiko Nakashima
CPU Meets VR: A Scalable 3D Representation of Manycores for Behavior Analysis. CANDAR (2016)
Thi Hong Tran, Yuhei Nagao, Hiroshi Ochi
Algorithm and hardware design of a 2D sorter-based K-best MIMO decoder. EURASIP J. Wirel. Commun. Netw. 2014 (2014)
Thi Hong Tran, Hiroshi Ochi, Yuhei Nagao
A 4 × 4 multiplier-divider-less K-best MIMO decoder up to 2.7 Gbps. ISCAS (2014)
Thi Hong Tran, Yuhei Nagao, Hiroshi Ochi, Masayuki Kurosaki
ASIC design of 7.7 Gbps multi-mode LDPC decoder for IEEE 802.11ac. ISCIT (2014)
Reina Hongyo, Thi Hong Tran, Leonardo Lanante, Hiroshi Ochi, Yuhei Nagao
A design of low complex log likelihood ratio for MIMO decoder using the bit shift. APCCAS (2014)
Thi Hong Tran, Hiroshi Ochi, Yuhei Nagao
A 2D Sorter-Based K-Best Algorithm for High Order Modulation MIMO Systems. VTC Fall (2014)
Thi Hong Tran, Leonardo Lanante, Yuhei Nagao, Hiroshi Ochi
Hardware Design of Multi Gbps RC4 Stream Cipher. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (11) (2013)
Thi Hong Tran, Leonardo Lanante, Yuhei Nagao, Masayuki Kurosaki, Hiroshi Ochi
Hardware Implementation of High Throughput RC4 algorithm. ISCAS (2012)