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Tai-Ping Wang
Publication Activity (10 Years)
Years Active: 2006-2019
Publications (10 Years): 4
Top Topics
Model Based Testing
Heterogeneous Computing
Microscopic Images
Class Separability
Top Venues
AICAS
ISCAS
J. Signal Process. Syst.
IEICE Trans. Electron.
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Publications
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Shih-Yu Chen
,
Gwo Giun Chris Lee
,
Tai-Ping Wang
,
Chin-Wei Huang
,
Jia-Hong Chen
,
Chang-Ling Tsai
Reconfigurable Edge via Analytics Architecture.
AICAS
(2019)
Gwo Giun Chris Lee
,
Chun-Hsi Huang
,
Chun-Fu (Richard) Chen
,
Tai-Ping Wang
Complexity-Aware Gabor Filter Bank Architecture Using Principal Component Analysis.
J. Signal Process. Syst.
89 (3) (2017)
Gwo Giun Chris Lee
,
Shi-Yu Hung
,
Tai-Ping Wang
,
Chun-Fu (Richard) Chen
,
Chi-Kuang Sun
,
Yi-Hua Liao
Efficient nuclei segmentation based on spectral graph partitioning.
ISCAS
(2016)
Tong-Yu Hsieh
,
Tai-Ping Wang
,
Shuo Yang
,
Chin-An Hsu
,
Yi-Lung Lin
An Area-Efficient Scalable Test Module to Support Low Pin-Count Testing.
IEICE Trans. Electron.
(3) (2016)
Ming-Der Shieh
,
Tai-Ping Wang
,
Der-Wei Yang
Low-power register-exchange survivor memory architectures for Viterbi decoders.
IET Circuits Devices Syst.
3 (2) (2009)
Ming-Der Shieh
,
Tai-Ping Wang
,
Chien-Ming Wu
Reducing Interconnect Complexity for Efficient Path Metric Memory Management in Viterbi Decoders.
IEICE Trans. Inf. Syst.
(9) (2008)
Jiun-Da Chen
,
Tai-Ping Wang
,
Chao-Lin Liu
以文件分類技術預測股價趨勢 (Predicting Trends of Stock Prices with Text Classification Techniques) [In Chinese].
ROCLING
(2007)
Ming-Der Shieh
,
Tai-Ping Wang
,
Chien-Ming Wu
,
Chun-Ming Huang
Efficient path metric access for reducing interconnect overhead in Viterbi decoders.
ISCAS
(2006)